訊息公告

12/23(二) Memory Hierarchy, Address Translation and Page Walks, Dr. Krishna Kavi

這是12/23(二) 資訊工程研討的演講,歡迎聽講!

演講者: Dr. Krishna Kavi, Professor of Computer Science and Engineering and the Director of the NSF               Industry/University Cooperative Research Center for Net-Centric Software and Systems at the University of North  Texas

 時間: 12/23(二) 13:20~15:10

 地點: 綜合一館地下室 101室 (AB101)

 主持人:王昱舜教授

 主題: Memory Hierarchy, Address Translation and Page Walks

 大綱:

Today's computer systems include several levels of memory: L1, L2, L3 caches, DRAM main memory, SSD and hard disk drives. With new technologies such as 3D stacked DRAMs, Phase Change Memories (PCM), it may be possible to include a tera-byte of main memory in a computer system. The need to reduce the energy consumed by applications, while maintaining acceptable levels of performance makes managing data across these memory levels is very critical.

Virtual to physical address translation adds another level of complexity to the management of memory systems. Addresses generated by a processor are virtual addresses while the location of the data in the memory systems is based on physical addresses. Virtual to physical address translation involves several levels of page tables, and page table lookups (page table walks) cause additional memory accesses. Virtualization, which is commonly used in Cloud computing adds another layer of address translation, since guest OS's "physical addresses" must be translated by the Hypervisor into machine (physical) addresses. Caching translated addresses and other hardware support for address translation may reduce the number of page tables that must be consulted, improving the speed of address translation.

In this presentation, I will introduce how traditional memory hierarchy is designed and how virtual addresses are translated into physical (or machine addresses in VMs) addresses. Then I will introduce techniques to improve energy and execution performance with some innovative designs.

簡介:

Dr. Krishna Kavi is currently a Professor of Computer Science and Engineering and the Director of the NSF Industry/University Cooperative Research Center for Net-Centric Software and Systems at the University of North Texas. During 2001-2009, he served as the Chair of the department. He also held an Endowed Chair Professorship in Computer Engineering at the University of Alabama in Huntsville, and served on the faculty of the University Texas at Arlington. He was a Scientific Program Manger at US National Science Foundation during 1993-1995. He served on several editorial boards and program committees.

His research is primarily on Computer Systems Architecture including multi-threaded and multi-core processors, cache memories and hardware assisted memory managers. He also conducted research in the area of formal methods, parallel processing, and real-time systems. He published nearly 200 technical papers in these areas. He received more than US $6 M in research grants. He graduated 14 PhDs and more than 35 MS students. He received his PhD from Southern Methodist University in Dallas Texas and a BS in EE from the Indian Institute of Science in Bangalore, India.

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