游逸平 Yi-Ping You 副教授

1. Yi-Ping You and Szu-Chieh Chen, “VecRA: A Vector-Aware Register Allocator for GPU Shader Processors,” Volume 15, Issue 4, Article 64, ACM Transactions on Embedded Computing Systems, August 2016.
2. Yi-Ping You and Jian-Ru Chen, “A Static Region-Based Compiler for the Dalvik Virtual Machine,” Software: Practice and Experience, Volume 46, Issue 8, Pages 1109-1130, John Wiley & Sons, Ltd., August 2016.
3. Yi-Ping You, Hen-Jung Wu, Yeh-Ning Tsai, and Yen-Ting Chao, “VirtCL: A Framework for OpenCL Device Abstraction and Management,” in Proceedings of the the 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP ’15), Pages 161–172, San Francisco, CA, USA, February 7-11, 2015.
4. Wen-Li Shih, Yi-Ping You, Chung-Wen Huang, and Jenq Kuen Lee, “Compiler Optimization for Reducing Leakage Power in Multithread BSP Programs,” ACM Transactions on Design Automation of Electronic Systems, Volume 20, Issue 1, Article 9, November, 2014.
5. Tsan-Rong Tien and Yi-Ping You, “Enabling OpenCL Support for GPGPU in Kernel-based Virtual Machine,” Software: Practice and Experience, Volume 44, Issue 5, Pages 483–510, John Wiley & Sons, Ltd., May 2014.
6. Yi-Ping You and Shen-Hong Wang, “Energy-Aware Code Motion for GPU Shader Processors,” ACM Transactions on Embedded Computing Systems, Volume 13, Issue 3, Article 49, December 2013.
7. Yi-Ping You and Yu-Shiuan Tsai, ``Compiler-Assisted Resource Management for CUDA Programs,'' in Proceedings of the 16th Workshop on Compilers for Parallel Computing (CPC'12), Podava, Italy, January 11-13, 2012.
8. Chia Han Lu, Young-Chia Lin, Yi-Ping You, and Jenq-Kuen Lee, ``LC-GRFA: Global Register File Assignment with Local Consciousness for VLIW DSP Processors with Non-uniform Register Files,'' Concurrency and Computation: Practice and Experience, Special Issue on CPC 2007, Vol. 21, No. 1, pp. 101-114, John Wiley & Sons, Ltd., January 2009.
9. Yung-Chia Lin, Chia Han Lu, Chung-Ju Wu, Chung-Lin Tang, Yi-Ping You, Ya-Chiao Moo, and Jenq Kuen Lee, ``Effective Code Generation for Distributed and Ping-Pong Register Files: a Case Study on PAC VLIW DSP Cores,'' Journal of VLSI Signal Processing Systems, Vol. 51, No. 3, pp. 269-288, Springer Netherlands, June 2008.
10. Yung-Chia Lin, Yi-Ping You, and Jenq Kuen Lee, ``PALF: Compiler Supports for Irregular Register Files in Clustered VLIW Processors,'' Concurrency and Computation: Practice and Experience, Special Issue on CPC 2006, Vol. 19, Issue 18, pp. 2391-2406, John Wiley & Sons, Ltd., December 2007.
11. Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee, Wei-Kuan Shih, and Ting-Ting Hwang, ``Energy-Aware Scheduling and Simulation Methodologies for Parallel Security Processors with Multiple Voltage Domains,'' Journal of Supercomputing, Vol. 42, No. 2, pp. 201-223, Springer, November 2007.
12. Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Yung-Chia Lin, Yi-Ping You, Chia-Han Lu, and Jenq-Kuen Lee, ``Enabling Compiler Flow for Embedded VLIW DSP Processors with Distributed Register Files,'' ACM SIGPLAN Notices, ACM LCTES 2007 Issue, Vol. 42, Issue 7, pp. 146-148, ACM, July, 2007.
13. Yi-Ping You, Chung-Wen Huang, and Jenq Kuen Lee, ``Compilation for Compact Power-Gating Controls,'' ACM Transactions on Design Automation of Electronic Systems, Vol. 12, Issue 4, Article 51, ACM, New York, September 2007.
14. Yi-Ping You, Chingren Lee, and Jenq Kuen Lee, ``Compilers for Leakage Power Reduction,'' ACM Transactions on Design Automation of Electronic Systems, Vol. 11, Issue 1, ACM, New York, pp. 147-164, January 2006.

1. Misra C支援工具之開發（2018），工研院
2. 以有效率的OpenCL執行架構優化OpenVX運行系統（2017-2018），科技部
3. 針對異質運算之 OpenCL 裝置抽象化與管理（2015），工研院
4. 網頁瀏覽器上動態語言之混合式執行模型（2014-2017），科技部
5. JavaScript 應用程式執行效能改進研究案（2014），資策會
6. JavaScript Engine效能改進研究案（2013），資策會
7. 在異質多核心平台上OpenCL架構中資源管理之研究（2011-2014），國科會
8. shader碼最佳化技術研究（2011），資策會
9. 適用於嵌入式環境之shader碼編譯技術（2010），資策會
10. 資訊產品安全檢測技術整合型研究（2009-2010），中科院
11. 多執行緒程式之漏電耗能管理方法（2008-2011），國科會