吳凱強

吳凱強 Kai-Chiang Wu 資訊科學與工程研究所所長 / 教授

經歷

1.Software Engineer, Design Technology Solutions, Intel Corporation, 08/2011 – 07/2013
2.Research Assistant, Energy Aware Computing (EnyAC) Group, Carnegie Mellon University, 08/2006 – 07/2011

關於

研究興趣

深度學習模型之效能優化技術、邊緣人工智慧、晶片設計自動化、人工智慧於設計自動化之應用、 可信、可靠、可測試系統設計

實驗室

1. Kai-Chiang Wu and Diana Marculescu, “Power-Planning-Aware Soft Error Hardening via Selective Voltage Assignment,” <i>IEEE</i> Transactions on Very Large Scale Integration Systems. (in press)
2. Kai-Chiang Wu and Diana Marculescu, “A Low-Cost, Systematic Methodology for Soft Error Robustness of Logic Circuits,” <i>IEEE</i> Transactions on Very Large Scale Integration Systems, Feb. 2013.
3. Kai-Chiang Wu, Ming-Chao Lee, Diana Marculescu, and Shih-Chieh Chang, “Mitigating Lifetime Underestimation: A System-Level Approach Considering Temperature Variations and Correlations between Failure Mechanisms,” in Proc. of Design, Automation, and Test in Europe Conference (DATE), March 2012.
4. Kai-Chiang Wu and Diana Marculescu, “Joint Logic Restructuring and Pin Reordering against NBTI-Induced Performance Degradation,” in Proc. of Design, Automation, and Test in Europe Conference (DATE), April 2009.
5. Natasa Miskov-Zivanov, Kai-Chiang Wu, and Diana Marculescu, “Process Variability-Aware Transient Fault Modeling and Analysis,” in Proc. of International Conference on Computer-Aided Design (ICCAD), Nov. 2008.
6. Kai-Chiang Wu and Diana Marculescu, “Power-Aware Soft Error Hardening via Selective Voltage Scaling,” in Proc. of International Conference on Computer Design (ICCD), Oct. 2008. (Best Paper Award)
7. Shih-Chieh Chang, Cheng-Tao Hsieh, and Kai-Chiang Wu, “Re-synthesis for Delay Variation Tolerance,” in Proc. of Design Automation Conference (DAC), June 2004.