Time: 3/30 (Wed) 3.30-5:00 PM
Location: EC122
- Topic:
Innovations in VLSI Physical Designs and EDA Software to Continue Moore’s Law
- Speaker:
KEH-JENG CHANG(張克正)
- Abstract:
What are some great and long-term careers? Two good examples are computer career and semiconductor career. Working together, they have made computers vastly powerful and extremely intelligent. We feel excited that computers, portable devices, clouds, and cars are to improve our quality of lives even further. This talk focus on semiconductor research and development (R&D) that relies heavily on EDA software tools, which were born around 50 years ago. The speaker hopes to describe new and useful semiconductor research tasks that require more and more computer programmers to write EDA software to make TSMC a better semiconductor company in the coming decades.
- Biography:
KEH-JENG CHANG is Deputy Director in TSMC Headquarters, conducting EDA modeling for sub-3nm CMOS nodes.
He received his B.S. and M.S. degrees, both in Electrical Engineering, from National Taiwan University, Taipei, Taiwan, and his Ph.D. degree in Computer Science from University of California, Los Angeles.
After his UCLA study, Dr. Chang spent more than 14 years conducting VLSI EDA researches in the Silicon Valley of California for two companies consecutively, i.e. Hewlett-Packard Company and Sequence Design Inc. He then returned to his home country Taiwan and continued his VLSI EDA researches in National Tsing Hua University in Hsinchu. In 2013, he joined the research and development organization in TSMC Headquarters, also in Hsinchu, where has been performing EDA and nanometer interconnect parasitic EDA modeling. He has published scores of journal and conference papers and has been awarded more than 18 patents, in USA and Asia, on methods and systems related to submicron and nanometer EDA, parametric testing, electronic packaging, and yield improvement.